The present invention relates to semiconductor technology. More particularly, this invention relates to an improved semiconductor device that is free of capillary induced etching effects and a manufacturing method thereof.
In the micro electromechanical system (MEMS) field, a variety of materials and thin films with different thicknesses may be formed on the wafer to implement certain functions of a MEMS device. In the patterning process, when an etching process is performed on the different thicknesses of the thin films, in order to obtain a certain shape, the silicon oxide portion at the interface is left unetched to form a spacer. FIG. 1A is a cross-sectional view of a portion of a structure in the related art. As shown in FIG. 1A, the structure includes a first polysilicon layer 101, a first silicon dioxide layer 102 on first polysilicon layer 101, a second polysilicon layer 103 on first silicon dioxide layer 102, a spacer (e.g., silicon dioxide) 104 on the side of second polysilicon layer 103, and a silicon nitride layer 105 covering theses layers.
FIG. 1B is a cross-sectional view of the structure of FIG. 1A taken along the line A-A′. For the clarity of the description, FIG. 1B does not show silicon nitride layer 105. Second polysilicon layer 103 includes a main chip region 1031 and a rod-like region 1032. The cross-sectional view of the structure shown in FIG. 1A is a schematic cross-sectional view of the portion of main chip region 1031 (shown in the dotted line box portion in FIG. 1B, where silicon nitride layer 105 is not shown).
In the process of forming a cavity, first silicon dioxide layer 102 (the first silicon dioxide layer serves as a buffer oxide) of main chip region 103 is etched using a buffered oxide etch (BOE) process, but spacer 104 (shown in FIG. 1B) at the interface of main chip region 1031 is significantly etched because the spacer is very fine (which may be referred to as capillary silicon dioxide). In the BOE process, due to the capillary effect, the portion of the silicon oxide in the vicinity of the spacer is etched quickly, far beyond the normal etch rate, resulting in an excessive etching of the silicon oxide that should not have been etched. Thus, it is impossible to control the to-be-etched area, as shown in FIG. 1C. The capillary silicon dioxide (i.e., the spacer) is etched too fast, causing the region in the vicinity of the spacer to have a void, so that when the structure is in a vibration or under pressure, cracks will develop in the structure and cause the device failure. The dotted line triangle in FIG. 1B is a region which is not intended to be affected by the BOE process.
In view of the above described problems, conventional methods may utilize the following approaches. One approach is to increase the density of the silicon dioxide by subjecting the initial capillary silicon dioxide (i.e., spacer 104) to an annealing treatment. Although the BOE process reduces the etch rate for the silicon dioxide, and the BOE affected area can be reduced, however, this approach is not sufficient to improve the device reliability.
The other approach is to replace the initial capillary silicon dioxide with silicon nitride. However, the capillary silicon nitride cannot be etched cleanly, and as a result, fall off (peeling) of the silicon nitride on the device causes device defects.